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19-3656; Rev 1; 2/07
1A, 40V, MAXPower Step-Down DC-DC Converters
General Description
The MAX5080/MAX5081 are 250kHz PWM step-down DC-DC converters with an on-chip, 0.3 high-side switch. The input voltage range is 4.5V to 40V for the MAX5080 and 7.5V to 40V for the MAX5081. The output is adjustable from 1.23V to 32V and can deliver up to 1A of load current. Both devices utilize a voltage-mode control scheme for good noise immunity in the high-voltage switching environment and offer external compensation allowing for maximum flexibility with a wide selection of inductor values and capacitor types. The switching frequency is internally fixed at 250kHz and can be synchronized to an external clock signal through the SYNC input. Light load efficiency is improved by automatically switching to a pulse-skip mode. All devices include programmable undervoltage lockout and soft-start. Protection features include cycle-bycycle current limit, hiccup-mode output short-circuit protection, and thermal shutdown. Both devices are available in a space-saving, high-power (2.7W), 16-pin TQFN package and are rated for operation over the -40C to +125C temperature range.
Features
4.5V to 40V (MAX5080) or 7.5V to 40V (MAX5081) Input Voltage Range 1A Output Current VOUT Range From 1.23V to 32V Internal High-Side Switch Fixed 250kHz Internal Oscillator Automatic Switchover to Pulse-Skip Mode at Light Loads External Frequency Synchronization Thermal Shutdown and Short-Circuit Protection Operates Over the -40C to +125C Temperature Range Space-Saving (5mm x 5mm) High-Power 16-Pin TQFN Package
MAX5080/MAX5081
Ordering Information
PART MAX5080ATE MAX5081ATE TEMP RANGE -40C to +125C -40C to +125C PINPACKAGE 16 TQFN-EP* 16 TQFN-EP* PKG CODE T1655-2 T1655-2
Applications
FireWire(R) Power Supplies Distributed Power Automotive Industrial
*EP = Exposed pad. Pin Configurations appear at end of data sheet. FireWire is a registered trademark of Apple Computer, Inc.
Typical Operating Circuits
VIN 4.5V TO 40V CF D1
IN R1
DVREG
C-
C+
BST LX
CBST L1 VOUT C6
C1
REG
MAX5080
ON/OFF SYNC SGND PGND C2 PGND SS CSS FB
D2
C5 R6
R3
C8 R2 COMP R5 C7 R4
PGND
Typical Operating Circuits continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
ABSOLUTE MAXIMUM RATINGS
IN, ON/OFF to SGND..............................................-0.3V to +45V LX to SGND .................................................-0.3V to (VIN + 0.3V) BST to SGND ................................................-0.3V to (VIN + 12V) BST to LX................................................................-0.3V to +12V PGND to SGND .....................................................-0.3V to +0.3V REG, DVREG, SYNC to SGND ...............................-0.3V to +12V FB, COMP, SS to SGND ...........................-0.3V to (VREG + 0.3V) C+ to PGND (MAX5080 only)................(VDVREG - 0.3V) to +12V C- to PGND (MAX5080 only) ................-0.3V to (VDVREG + 0.3V) Continuous current through internal power MOSFET (pins 11/12 connected together and pins 13/14 connected together) TJ = +125C.........................................................................3A TJ = +150C.........................................................................2A Continuous Power Dissipation* (TA = +70C) 16-Pin TQFN (derate 33.3mW/C above +70C) ...2666.7mW 16-Pin TQFN (JA)........................................................30C/W 16-Pin TQFN (JC).......................................................1.7C/W Operating Temperature Range .........................-40C to +125C Maximum Junction Temperature .....................................+150C Storage Temperature Range .............................-60C to +150C Lead Temperature (soldering, 10s) .................................+300C *As per JEDEC 51 Standard
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = VON/OFF = 12V, VREG = VDVREG, VSYNC = PGND = SGND, TA = TJ = -40C to +125C, unless otherwise noted. Typical values are at TA= + 25C.) (Note 1)
PARAMETER Input Voltage Range Undervoltage Lockout Threshold Undervoltage Lockout Hysteresis Switching Supply Current (PWM Operation) Efficiency No-Load Supply Current (PFM Operation) Shutdown Current ON/OFF CONTROL Input Voltage Threshold Input Voltage Hysteresis Input Bias Current ERROR AMPLIFIER/SOFT-START Soft-Start Current Reference Voltage (Soft-Start) FB Regulation Voltage FB Input Range FB Input Current COMP Voltage Range Open-Loop Gain Unity-Gain Bandwidth ICOMP = -500A to +500A ISS VSS VFB ICOMP = -500A to +500A 8 1.215 1.215 0 -250 0.25 80 1.8 15 1.228 1.228 24 1.240 1.240 1.5 +250 4.50 A V V V nA V dB MHz VON/OFF = 0 to 40V -250 VON/ OFF VON/ OFF rising 1.20 1.23 0.12 +250 1.25 V V nA ISHDN SYMBOL VIN UVLO UVLOHYST ISW MAX5080 MAX5081 VIN rising, MAX5080 VIN rising, MAX5081 MAX5080 MAX5081 VFB = 0V, MAX5080 VFB = 0V, MAX5081 VIN = 12V, VOUT = 3.3V, IOUT = 1A VIN = 4.5V, VOUT = 3.3V, IOUT = 1A (MAX5080) MAX5080 MAX5081 VON/OFF = 0V, VIN = 40V CONDITIONS MIN 4.5 7.5 3.9 6.8 0.4 0.7 10.5 9.5 84 88 1.4 1.3 200 2.5 2.3 300 % TYP MAX 40 40 4.2 7.3 UNITS V V V mA
mA A
2
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1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VON/OFF = 12V, VREG = VDVREG, VSYNC = PGND = SGND, TA = TJ = -40C to +125C, unless otherwise noted. Typical values are at TA= + 25C.) (Note 1)
PARAMETER FB Offset Voltage OSCILLATOR Frequency Maximum Duty Cycle SYNC High-Level Voltage SYNC Low-Level Voltage SYNC Frequency Range PWM Modulator Gain Ramp Level Shift (Valley) POWER SWITCH Switch On-Resistance Switch Gate Charge Switch Leakage Current BST Leakage Current CHARGE PUMP C- Output Voltage Low C- Output Voltage High DVREG to C+ On-Resistance LX to PGND On-Resistance CURRENT-LIMIT COMPARATOR Pulse-Skip Threshold Cycle-by-Cycle Current Limit Number of Consecutive ILIM Events to Hiccup Hiccup Timeout INTERNAL VOLTAGE REGULATOR Output Voltage Line Regulation Load Regulation Dropout Voltage VREG MAX5080 MAX5081 VIN = 5.5V to 40V, MAX5080 VIN = 9.0V to 40V, MAX5081 IREG = 0 to 20mA VIN = 4.5V, IREG = 20mA, MAX5080 VIN = 7.5V, IREG = 20mA, MAX5081 4.75 7.6 5 8 5.25 8.4 1 1 0.25 0.5 0.5 V mV/V V V IPFM IILIM 100 1.4 200 2 7 512 Clock periods 300 2.6 mA A MAX5080 only, sinking 10mA MAX5080 only, relative to DVREG, sourcing 10mA MAX5080 only, sourcing 10mA Sinking 10mA 0.1 0.1 10 12 V V VBST - VLX = 6V VBST - VLX = 6V VIN = 40V, VLX = VBST = 0V VBST = VLX = VIN = 40V 0.3 6 10 10 0.6 nC A A fSYNC fSYNC = 150kHz to 350kHz 150 10 0.3 fSW DMAX VSYNC = 0V VSYNC = 0V, VIN = 4.5V, MAX5080 VSYNC = 0V, VIN = 7.5V, MAX5081 VSYNC = 0V, VIN 40V 225 87 87 87 2.2 0.8 350 V V kHz V/V V % 250 275 kHz SYMBOL CONDITIONS ICOMP = -500A to +500A MIN -5 TYP MAX +5 UNITS mV
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3
1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VON/OFF = 12V, VREG = VDVREG, VSYNC = PGND = SGND, TA = TJ = -40C to +125C, unless otherwise noted. Typical values are at TA= + 25C.) (Note 1)
PARAMETER THERMAL SHUTDOWN Thermal Shutdown Temperature Thermal Shutdown Hysteresis Temperature rising +160 20 C C SYMBOL CONDITIONS MIN TYP MAX UNITS
Note 1: 100% production tested at TA = +25C and TA = TJ = +125C. Limits at -40C are guaranteed by design.
Typical Operating Characteristics
(VIN = 12V, see Figure 5 (MAX5080) and Figure 6 (MAX5081), TA = +25C, unless otherwise noted.)
UNDERVOLTAGE LOCKOUT HYSTERESIS vs. TEMPERATURE (MAX5080)
MAX5080 toc01
UNDERVOLTAGE LOCKOUT HYSTERESIS vs. TEMPERATURE (MAX5081)
UNDERVOLTAGE LOCKOUT HYSTERESIS (V) ON/OFF THRESHOLD HYSTERESIS (V) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 -40 -15 10 35 60 85 110 135 -40
MAX5080 toc02
ON/OFF THRESHOLD HYSTERESIS vs. TEMPERATURE
MAX5080 toc03
1.0 UNDERVOLTAGE LOCKOUT HYSTERESIS (V) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 -15 10 35 60 85 110
1.0
0.20
0.15
0.10
0.05
135
-15
10
35
60
85
110
135
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C )
SHUTDOWN SUPPLY CURRENT vs. INPUT VOLTAGE (MAX5080)
MAX5080 toc04
SHUTDOWN SUPPLY CURRENT vs. INPUT VOLTAGE (MAX5081)
MAX5080 toc05
NO-LOAD SUPPLY CURRENT vs. INPUT VOLTAGE (MAX5080)
3.5 SUPPLY CURRENT (mA) 3.0 2.5 2.0 1.5 1.0 TA = +25C TA = -40C TA = +85C TA = +135C
MAX5080 toc06
250 SHUTDOWN SUPPLY CURRENT (A) 225 200 175 150 125 100 75 50 25 0 0 5 10 15 20 25 30 35 VON/OFF = 0V TA = +25C TA = -40C TA = +135C TA = +85C
300 275 SHUTDOWN SUPPLY CURRENT (A) 250 225 200 175 150 125 100 75 50 25 0 0
4.0
TA = +135C TA = +85C
TA = +25C
TA = -40C
VON/OFF = 0V 5 10 15 20 25 30 35 40
0.5 0 0 5 10 15 20 25 30 35 40
40
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
4
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1A, 40V, MAXPower Step-Down DC-DC Converters
Typical Operating Characteristics (continued)
(VIN = 12V, see Figure 5 (MAX5080) and Figure 6 (MAX5081), TA = +25C, unless otherwise noted.)
MAX5080/MAX5081
OPERATING FREQUENCY vs. TEMPERATURE
MAX5080 toc07
MAXIMUM DUTY CYCLE vs. INPUT VOLTAGE (MAX5080)
MAX5080 toc08
MAXIMUM DUTY CYCLE vs. INPUT VOLTAGE (MAX5081)
98 MAXIMUM DUTY CYCLE (%) 96 94 92 90 88 86 84 82 80
MAX5080 toc09
260 258 OPERATING FREQUENCY (kHz) 256 254 252 250 248 246 244 242 240 -40 -15 10 35 60 85 110 VIN = 40V VIN = 4.5V
100 98 MAXIMUM DUTY CYCLE (%) 96 94 92 90 88 86 84 82 80
100
135
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
TEMPERATURE (C)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
OPEN-LOOP GAIN/PHASE vs. FREQUENCY
MAX5080 toc10
OUTPUT CURRENT LIMIT vs. INPUT VOLTAGE
175 150 PHASE (DEGREES) 125 OUTPUT CURRENT LIMIT (A) 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 TA = +85C TA = +135C MAX5080 TA = -40C TA = +25C
MAX5080 toc11
2.5
100 80 GAIN GAIN (dB) 60 40
100 20 PHASE 0 -20 0 0.001 0.01 0.1 1 10 FREQUENCY (kHz) 75 50 100 1000 10,000
1.5 0 5 10 15 20 25 30 35 40 INPUT VOLTAGE (V)
TURN-ON/OFF WAVEFORM
MAX5080 toc12
TURN-ON/OFF WAVEFORM
MAX5080 toc13
ILOAD = 1A VON/OFF 2V/div
ILOAD = 100mA
VON/OFF 2V/div
VOUT 2V/div
VOUT 2V/div
2ms/div
2ms/div
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5
1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
Typical Operating Characteristics (continued)
(VIN = 12V, see Figure 5 (MAX5080) and Figure 6 (MAX5081), TA = +25C, unless otherwise noted.)
OUTPUT VOLTAGE vs. TEMPERATURE
MAX5080 toc14
EFFICIENCY vs. LOAD CURRENT
90 80 EFFICIENCY (%) VOUT = 3.3V VIN = 7.5V VIN = 4.5V VIN = 24V VIN = 12V
MAX5080 toc15
3.40 3.38 3.36 OUTPUT VOLTAGE (V) 3.34 3.32 3.30 3.28 3.26 3.24 3.22 3.20 -40 -15 10 35 60 85 110 ILOAD = 1A ILOAD = 0A MAX5080
100
70 60 50 40 30 20
VIN = 40V MAX5080 0.01 0.1 1
135
0 0.001
TEMPERATURE (C)
LOAD CURRENT (A)
EFFICIENCY vs. LOAD CURRENT
MAX5080 toc16
LOAD-TRANSIENT RESPONSE
MAX5080 toc17
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 0 0.001 0.01 0.1 VIN = 40V VOUT = 5V VIN = 7.5V
VIN = 12V, IOUT = 0.25A TO 1A MAX5080 VOUT AC-COUPLED 200mV/div
VIN = 12V VIN = 24V
ILOAD 500mA/div 0 MAX5081 1 200s/div
LOAD CURRENT (A)
6
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1A, 40V, MAXPower Step-Down DC-DC Converters
Typical Operating Characteristics (continued)
(VIN = 12V, see Figure 5 (MAX5080) and Figure 6 (MAX5081), TA = +25C, unless otherwise noted.)
LOAD-TRANSIENT RESPONSE
MAX5080 toc18
MAX5080/MAX5081
LX VOLTAGE AND INDUCTOR CURRENT
MAX5080 toc19
VIN = 4.5V, IOUT = 0.25A TO 1A MAX5080 VOUT AC-COUPLED 500mV/div VLX 5V/div
ILOAD 500mA/div 0 ILOAD = 40mA 200s/div 2s/div
INDUCTOR CURRENT 200mA/div
LX VOLTAGE AND INDUCTOR CURRENT
MAX5080 toc20
LX VOLTAGE AND INDUCTOR CURRENT
MAX5080 toc21
VLX 5V/div
VLX 5V/div
INDUCTOR CURRENT 100mA/div 0 ILOAD = 140mA 2s/div 2s/div 0 ILOAD = 1A
INDUCTOR CURRENT 500mA/div
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7
1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
Pin Description
PIN MAX5080 1 2 MAX5081 1 2 NAME COMP FB FUNCTION Error Amplifier Output. Connect COMP to the compensation feedback network. Feedback Regulation Point. Connect to the center tap of a resistive divider from converter output to SGND to set the output voltage. The FB voltage regulates to the voltage present at SS (1.23V). ON/OFF and External UVLO Control. The ON/OFF rising threshold is set to approximately 1.23V. Connect to the center tap of a resistive divider from IN to SGND to set the UVLO (rising) threshold. Pull ON/OFF to SGND to shut down the device. ON/OFF can be used for powersupply sequencing. Connect to IN for always-on operation. Soft-Start and Reference Output. Connect a capacitor from SS to SGND to set the soft-start time. See the Applications Information section to calculate the value of the CSS capacitor. Oscillator Synchronization Input. SYNC can be driven by an external 150kHz to 350kHz clock to synchronize the MAX5080/MAX5081's switching frequency. Connect SYNC to SGND when not used. Gate Drive Supply for High-Side MOSFET Driver. Connect externally to REG for MAX5080. Connect to REG and the anode of the boost diode for MAX5081. Charge-Pump Flying Capacitor Positive Connection Charge-Pump Flying Capacitor Negative Connection No Connection. Not internally connected. Can be left floating or connected to SGND. Power Ground Connection. Connect the input filter capacitor's negative terminal, the anode of the freewheeling diode, and the output filter capacitor's return to PGND. Connect externally to SGND at a single point near the input capacitor's return terminal. High-Side Gate Driver Supply. Connect BST to the cathode of the boost diode and to the positive terminal of the boost capacitor. Source Connection of Internal High-Side Switch. Connect the inductor and rectifier diode's cathode to LX. Supply Input Connection. Connect to an external voltage source from 4.5V to 40V (MAX5080) or a 7.5V to 40V (MAX5081). Internal Regulator Output. 5V output for the MAX5080 and 8V output for the MAX5081. Bypass to SGND with at least a 1F ceramic capacitor. Signal Ground Connection. Solder the exposed pad to a large SGND plane. Connect SGND and PGND together at one point near the input bypass capacitor return terminal. Exposed Pad. Connect exposed pad to SGND.
3
3
ON/OFF
4
4
SS
5
5
SYNC
6 7 8 -- 9
6 -- -- 7, 8 9
DVREG C+ CN.C. PGND
10 11, 12 13, 14 15 16 EP
10 11, 12 13, 14 15 16 EP
BST LX IN REG SGND EP
Detailed Description
The MAX5080/MAX5081 are voltage-mode buck converters with internal 0.3 power MOSFET switches. The MAX5080 has a wide input voltage range of 4.5V to 40V. The MAX5081's input voltage range is 7.5V to 40V. The internal low RDS_ON switch allows for up to 1A of output current. The 250kHz fixed switching frequency, external compensation, and voltage feed-forward simplify loop compensation design and allow for a variety of L and C filter components. Both devices offer an
8
automatic switchover to pulse-skipping (PFM) mode, providing low quiescent current and high efficiency at light loads. Under no load, a PFM mode operation reduces the current consumption to only 1.4mA. In shutdown, the supply current falls to 200A. Additional features include an externally programmable undervoltage lockout through the ON/OFF pin, a programmable soft-start, cycle-by-cycle current limit, hiccup mode output short-circuit protection, and thermal shutdown.
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1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
ON/OFF CC+ DVREG
IN LDO REG EN 1.23V 1.23V >1.23V ON <1.11V OFF
DVREG LEVEL SHIFT
PCLK
SGND
MAX5080
ISS REF VREF THERMAL SHDN EN REGOK 1.23V E/A FB SSA VREF PFM COMP REF_PFM HIGH-SIDE CURRENT SENSE BST ILIM REF_ILIM IN OVERL OVERLOAD MANAGEMENT ILIM CLK
SS
IN CPWM SYNC EN OSC RAMP 0.3V CLK
LOGIC LX DVREG CHARGE-PUMP MANAGEMENT PCLK SCLK PGND
Figure 1. MAX5080 Simplified Block Diagram
Internal Linear Regulator (REG)
REG is the output terminal of a 5V (MAX5080), or 8V (MAX5081) LDO which is powered from IN and provides power to the IC. Connect REG externally to DVREG to provide power for the high-side MOSFET gate driver. Bypass REG to SGND with a ceramic capacitor of at least 1F. Place the capacitor physically close to the MAX5080/MAX5081 to provide good bypassing. During normal operation, REG is intended for powering up only the internal circuitry and should not be used to supply power to external loads.
Internal UVLO/External UVLO
The MAX5080/MAX5081 provides two undervoltage lockouts (UVLOs). An internal UVLO looks at the input voltage (VIN) and is fixed at 4.1V (MAX5080) or 7.1V (MAX5081). An external UVLO is sensed and programmed at the ON/OFF pin. The external UVLO over-
rides the internal UVLO when the external UVLO is higher than the internal UVLO. During startup, before any operation begins, the input voltage and the voltage at ON/OFF must exceed their respective UVLOs. The external UVLO has a rising threshold of 1.23V with 0.12V of hysteresis. Program the external UVLO by connecting a resistive divider from IN to ON/OFF to SGND. Connect ON/OFF to IN directly to disable the external UVLO. Driving ON/OFF to ground places the MAX5080/ MAX5081 in shutdown. When in shutdown the internal power MOSFET turns off, all internal circuitry shuts down and the quiescent supply current reduces to 200A. Connect an RC network from ON/OFF to SGND to set a turn-on delay that can be used to sequence the output voltages of multiple devices.
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9
1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
ON/OFF
IN LDO REG EN 1.23V 1.23V >1.23V ON <1.11V OFF
MAX5081
SGND
ISS
REF
VREF
THERMAL SHDN EN REGOK
OVERL
OVERLOAD MANAGEMENT
ILIM CLK
SS
1.23V E/A SSA VREF
ILIM REF_ILIM IN PFM HIGH-SIDE CURRENT SENSE BST
FB
COMP
REF_PFM
IN CPWM SYNC EN OSC RAMP 0.3V CLK ILIM
LOGIC LX DVREG BOOTSTRAP CONTROL PCLK SCLK PGND
Figure 2. MAX5081 Simplified Block Diagram
Soft-Start and Reference (SS)
SS is the 1.23V reference bypass connection for the MAX5080/MAX5081 and also controls the soft-start period. At startup, after VIN is applied and the internal and external UVLO thresholds are reached, the device enters soft-start. During soft-start, 15A is sourced into the capacitor (CSS) connected from SS to SGND causing the reference voltage to ramp up slowly. When VSS reaches 1.23V the output becomes fully active. Set the soft-start time (tSS) using following equation: t SS = 1.23V x CSS 15A
Internal Charge Pump (MAX5080)
The MAX5080 features an internal charge pump to enhance the turn-on of the internal MOSFET, allowing for operation with input voltages down to 4.5V. Connect a flying capacitor (C F) between C+ and C-, a boost diode from C+ to BST, as well as a bootstrap capacitor (CBST) between BST and LX to provide the gate drive voltage for the high-side n-channel DMOS switch. During the on-time, the flying capacitor is charged to VDVREG. During the off-time, the positive terminal of the flying capacitor (C+) is pumped to two times VDVREG and charge is dumped onto CBST to provide twice the regulator voltage across the high-side DMOS driver. Use a ceramic capacitor of at least 0.1F for CBST and CF located as close to the device as possible.
where tSS is in seconds and CSS is in Farads.
10
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1A, 40V, MAXPower Step-Down DC-DC Converters
For applications that do not require a 4.5V minimum input, use the MAX5081. In this device the charge pump is omitted and the input voltage range is from 7.5V to 40V. In this situation the boost diode and the boost capacitor are still required (see the MAX5081 Typical Operating Circuit). a soft-start sequence. This allows the device to operate with a continuous output short circuit. During normal operation, the current is monitored at the drain of the internal power MOSFET. When the current limit is exceeded, the internal power MOSFET turns off until the next on-cycle and a counter increments. If the counter counts seven consecutive current-limit events, the device discharges the soft-start capacitor and shuts down for 512 clock periods before restarting with a soft-start sequence. Each time the power MOSFET turns on and the device does not exceed the current limit, the counter is reset.
MAX5080/MAX5081
Gate Drive Supply (DVREG)
DVREG is the supply input for the internal high-side MOSFET driver. The power for DVREG is derived from the output of the internal regulator (REG). Connect DVREG to REG externally. We recommend the use of an RC filter (1 and 0.47F) from REG to DVREG to filter the noise generated by the switching of the charge pump. In the MAX5080, the high-side drive supply is generated using the internal charge pump along with the bootstrap diode and capacitor. In the MAX5081, the high-side MOSFET driver supply is generated using only the bootstrap diode and capacitor.
Thermal-Overload Protection
The MAX5080/MAX5081 feature an integrated thermaloverload protection. Thermal-overload protection limits the total power dissipation in the device and protects it in the event of an extended thermal fault condition. When the die temperature exceeds +160C, an internal thermal sensor shuts down the part, turning off the power MOSFET and allowing the IC to cool. After the temperature falls by 20C, the part will restart with a soft-start sequence.
Error Amplifier
The output of the internal error amplifier (COMP) is available for frequency compensation (see the Compensation Design section). The inverting input is FB, the noninverting input SS, and the output COMP. The error amplifier has an 80dB open-loop gain and a 1.8MHz GBW product. See the Typical Operating Character-istics for the Gain and Phase vs. Frequency graph.
Applications Information
Setting the Undervoltage Lockout
When the voltage at ON/OFF rises above 1.23V, the MAX5080/MAX5081 turns on. Connect a resistive divider from IN to ON/OFF to SGND to set the UVLO threshold (see Figure 5). First select the ON/OFF to the SGND resistor (R2) then calculate the resistor from IN to ON/OFF (R1) using the following equation: VIN R1 = R2 x - 1 VON/OFF where VIN is the input voltage at which the converter turns on, VON/OFF = 1.23V and R2 is chosen to be less than 600k. If the external UVLO divider is not used, connect ON/OFF to IN directly. In this case, an internal undervoltage lockout feature monitors the supply voltage at IN and allows operation to start when IN rises above 4.1V (MAX5080) and 7.1V (MAX5081).
Oscillator/Synchronization Input (SYNC)
With SYNC tied to SGND, the MAX5080/MAX5081 use their internal oscillator and switch at a fixed frequency of 250kHz. For external synchronization, drive SYNC with an external clock from 150kHz to 350kHz. When driven with an external clock, the device synchronizes to the rising edge of SYNC.
PWM Comparator/Voltage Feedforward
An internal 250kHz ramp generator is compared against the output of the error amplifier to generate the PWM signal. The maximum amplitude of the ramp (VRAMP) automatically adjusts to compensate for input voltage and oscillator frequency changes. This causes the VIN/VRAMP to be a constant 10V/V across the input voltage range of 4.5V to 40V (MAX5080) or 7.5V to 40V (MAX5081) and the SYNC frequency range of 150kHz to 350kHz.
Output Short-Circuit Protection (Hiccup Mode)
The MAX5080/MAX5081 protects against an output short circuit by utilizing hiccup-mode protection. In hiccup mode, a series of sequential cycle-by-cycle current-limit events will cause the part to shut down and restart with
Setting the Output Voltage
Connect a resistive divider from OUT to FB to SGND to set the output voltage. First calculate the resistor from OUT to FB using the guidelines in the Compensation Design section. Once R3 is known, calculate R4 using the following equation:
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11
1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
R4 = R3 VOUT - 1 VFB the input capacitor). The total voltage ripple is the sum of VQ and VESR. Calculate the input capacitance and ESR required for a specified ripple using the following equations: ESR = VESR IP-P IOUT_MAX + 2 IOUT_MAX x D(1 - D) VQ x fSW
where VFB = 1.23V.
Inductor Selection
Three key inductor parameters must be specified for operation with the MAX5080/MAX5081: inductance value (L), peak inductor current (IPEAK), and inductor saturation current (ISAT). The minimum required inductance is a function of operating frequency, input-to-output voltage differential, and the peak-to-peak inductor current (IP-P). Higher IP-P allows for a lower inductor value while a lower IP-P requires a higher inductor value. A lower inductor value minimizes size and cost and improves large-signal and transient response, but reduces efficiency due to higher peak currents and higher peak-to-peak output voltage ripple for the same output capacitor. On the other hand, higher inductance increases efficiency by reducing the ripple current. Resistive losses due to extra wire turns can exceed the benefit gained from lower ripple current levels especially when the inductance is increased without also allowing for larger inductor dimensions. A good compromise is to choose IP-P equal to 40% of the full load current. Calculate the inductor using the following equation: (V - V ) V L = OUT IN OUT VIN x fSW x IP-P VIN and VOUT are typical values so that efficiency is optimum for typical conditions. The switching frequency (fSW) is fixed at 250kHz or can vary between 150kHz and 350kHz when synchronized to an external clock (see the Oscillator/Synchronization Input (SYNC) section). The peak-to-peak inductor current, which reflects the peak-topeak output ripple, is worst at the maximum input voltage. See the Output Capacitor Selection section to verify that the worst-case output ripple is acceptable. The inductor saturating current (ISAT) is also important to avoid runaway current during continuous output short circuit. Select an inductor with an ISAT specification higher than the maximum peak current limit of 2.6A.
CIN = where
IP-P =
(VIN - VOUT ) x VOUT and VIN x fSW x L V D = OUT VIN
IOUT_MAX is the maximum output current, D is the duty cycle, and fSW is the switching frequency. The MAX5080/MAX5081 includes internal and external UVLO hysteresis and soft-start to avoid possible unintentional chattering during turn-on. However, use a bulk capacitor if the input source impedance is high. Use enough input capacitance at lower input voltages to avoid possible undershoot below the undervoltage lockout threshold during transient loading.
Output Capacitor Selection
The allowable output voltage ripple and the maximum deviation of the output voltage during load steps determine the output capacitance and its ESR. The output ripple is mainly composed of V Q (caused by the capacitor discharge) and VESR (caused by the voltage drop across the equivalent series resistance of the output capacitor). The equations for calculating the peak-to-peak output voltage ripple are: VQ = IPP 16 x COUT x fSW
Input Capacitor Selection
The discontinuous input current of the buck converter causes large input ripple currents and therefore the input capacitor must be carefully chosen to keep the input voltage ripple within design requirements. The input voltage ripple is comprised of VQ (caused by the capacitor discharge) and VESR (caused by the ESR of
12
VESR = ESR x IP-P Normally, a good approximation of the output voltage ripple is VRIPPLE VESR + VQ. If using ceramic capacitors, assume the contribution to the output voltage ripple from ESR and the capacitor discharge to be
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1A, 40V, MAXPower Step-Down DC-DC Converters
equal to 20% and 80%, respectively. IP-P is the peak-topeak inductor current (see the Input Capacitors Selection section) and fSW is the converter's switching frequency. The allowable deviation of the output voltage during fast load transients also determines the output capacitance, its ESR, and its equivalent series inductance (ESL). The output capacitor supplies the load current during a load step until the controller responds with a greater duty cycle. The response time (tRESPONSE ) depends on the closed-loop bandwidth of the converter (see the Compensation Design section). The resistive drop across the output capacitors ESR, the drop across the capacitors ESL (VESL), and the capacitor discharge causes a voltage droop during the loadstep. Use a combination of low-ESR tantalum/aluminum electrolyte and ceramic capacitors for better transient load and voltage ripple performance. Nonleaded capacitors and capacitors in parallel help reduce the ESL. Keep the maximum output voltage deviation below the tolerable limits of the electronics being powered. Use the following equations to calculate the required ESR, ESL, and capacitance value during a load step: ESR = VESR ISTEP ISTEP x tRESPONSE VQ VESL x t STEP ISTEP fZ1 = (COUT) (C5 in the Typical Application Circuit) and its equivalent series resistance (ESR). The power modulator incorporates a voltage feed-forward feature, which automatically adjusts for variations in the input voltage resulting in a DC gain of 10. The following equations define the power modulator: GMOD(DC) = VIN VRAMP = 10
MAX5080/MAX5081
fLC =
1 2 L x COUT 1 2 x COUT x ESR
fZESR =
The switching frequency is internally set at 250kHz or can vary from 150kHz to 350kHz when driven with an external SYNC signal. The crossover frequency (fC), which is the frequency when the closed-loop gain is equal to unity, should be set at 15kHz or below therefore: fC 15kHz The error amplifier must provide a gain and phase bump to compensate for the rapid gain and phase loss from the LC double pole. This is accomplished by utilizing a type 3 compensator that introduces two zeroes and 3 poles into the control loop. The error amplifier has a low-frequency pole (fP1) near the origin. The two zeros are at: 1 1 and fZ2 = 2 x R5 x C7 2 x (R6 + R3) x C6
COUT =
ESL =
where ISTEP is the load step, tSTEP is the rise time of the load step, and tRESPONSE is the response time of the controller.
and the higher frequency poles are at:
fP2 = 1 and fP3 = 2 x R6 x C6 1 C7 x C8 2 x R5 x C7 + C8
Compensation Design
The MAX5080/MAX5081 use a voltage-mode control scheme that regulates the output voltage by comparing the error amplifier output (COMP) with an internal ramp to produce the required duty cycle. The output lowpass LC filter creates a double pole at the resonant frequency, which has a gain drop of -40dB/decade. The error amplifier must compensate for this gain drop and phase shift to achieve a stable closed-loop system. The basic regulator loop consists of a power modulator, an output feedback divider, and a voltage error amplifier. The power modulator has a DC gain set by VIN/VRAMP, with a double pole and a single zero set by the output inductance (L), the output capacitance
Compensation When fC < fZESR Figure 3 shows the error amplifier feedback as well as its gain response for circuits that use low-ESR output capacitors (ceramic). In this case fZESR occurs after fC. fZ1 is set to 0.8 x fLC(MOD) and fZ2 is set to fLC to compensate for the gain and phase loss due to the double pole. Choose the inductor (L) and output capacitor (C OUT ) as described in the Inductor and Output Capacitor Selection section.
13
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1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
C8
R6 =
C7
1 2 x C6 x 0.5 x fSW
R5 C6 R6 R3 VOUT R4 REF EA
Since R3 >> R6, R3 + R6 can be approximated as R3. R3 is then calculated as:
COMP
R3
1 2 x fLC x C6
fP3 is set at 5xfC. Therefore C8 is calculated as:
GAIN (dB) CLOSED-LOOP GAIN EA GAIN
C8 =
C7 (2 x C7 x R5 x fP3 -1)
fZ1 fZ2
fC
fP2 fP3
FREQUENCY
Figure 3. Error Amplifier Compensation Circuit (Closed-Loop and Error-Amplifier Gain Plot) for Ceramic Capacitors
Pick a value for the feedback resistor R5 in Figure 3 (values between 1k and 10k are adequate). C7 is then calculated as: C7 = 1 2 x 0.8 x fLC x R5
Compensation When fC > fZESR For larger ESR capacitors such as tantalum and aluminum electrolytic ones, fZESR can occur before fC. If fZESR < fC, then fC occurs between fP2 and fP3. fZ1 and fZ2 remain the same as before however, fP2 is now set equal to fZESR. The output capacitor's ESR zero frequency is higher than fLC but lower than the closedloop crossover frequency. The equations that define the error amplifier's poles and zeroes (fZ1, fZ2, fP1, fP2, and fP3) are the same as before. However, fP2 is now lower than the closed-loop crossover frequency. Figure 4 shows the error amplifier feedback as well as its gain response for circuits that use higher-ESR output capacitors (tantalum or aluminum electrolytic). Pick a value for the feedback resistor R5 in Figure 4 (values between 1k and 10k are adequate). C7 is then calculated as: C7 = 1 2 x 0.8 x fLC x R5
fC occurs between fZ2 and fP2. The error-amplifier gain (GEA) at fC is due primarily to C6 and R5. Therefore, GEA(fC) = 2 x fC x C6 x R5 and the modulator gain at fC is: GMOD(fC) = GMOD(DC) (2)2 x L x COUT x fC2
The error amplifier gain between fP2 and fP3 is approximately equal to R5/R6 (given that R6 << R3). R6 can then be calculated as: R6 R5 x 10 x fLC2 fC2
Since GEA(fC) x GMOD(fC) = 1, C6 is calculated by: C6 = fC x L x COUT x 2 R5 x GMOD(DC)
C6 is then calculated as: C6 = COUT x ESR R6
fP2 is set at 1/2 the switching frequency (fSW). R6 is then calculated by:
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1A, 40V, MAXPower Step-Down DC-DC Converters
C8
R5 C6 R6 R3 VOUT R4 REF EA
C7
COMP
The power dissipated in the device is the sum of the power dissipated from supply current (PQ), transition losses due to switching the internal power MOSFET (PSW), and the power dissipated due to the RMS current through the internal power MOSFET (PMOSFET). The total power dissipated in the package must be limited such that the junction temperature does not exceed its absolute maximum rating of +150C at maximum ambient temperature. Calculate the power lost in the MAX5080/MAX5081 using the following equations: The power loss through the switch: PMOSFET = IRMS_MOSFET2 R RON PMOSFET = IRMS _ MOSFET2 x x ON
MAX5080/MAX5081
GAIN (dB)
CLOSED-LOOP GAIN
EA GAIN
IRMS_MOSFET =
fZ1 fZ2
fP2
fC
fP3
FREQUENCY
2 I2 PK + (I D PK x IDC ) + I DC x 3 IP-P IPK = IOUT + 2 IP-P IDC = IOUT - 2
Figure 4. Error Amplifier Compensation Circuit (Closed-Loop and Error Amplifier Gain Plot) for Higher ESR Output Capacitors
RON is the on-resistance of the internal power MOSFET (see Electrical Characteristics). The power loss due to switching the internal MOSFET: PSW = VIN x IOUT x (tR x tF ) x fSW 4
Since R3 >> R6, R3 + R6 can be approximated as R3. R3 is then calculated as: R3 1 2 x fLC x C6
fP3 is set at 5xfC. Therefore, C8 is calculated as: C8 = C7 (2 x C7 x R5 x fP3 -1)
where tR and tF are the rise and fall times of the internal power MOSFET measured at LX. The power loss due to the switching supply current (ISW): PQ = VIN x ISW The total power dissipated in the device will be: PTOTAL = PMOSFET + PSW + PQ
Power Dissipation
The MAX5080/MAX5081 is available in a thermally enhanced package and can dissipate up to 2.7W at TA = +70C. When the die temperature reaches +160C, the part shuts down and is allowed to cool. After the parts cool by 20C, the device restarts with a soft-start.
Chip Information
TRANSISTOR COUNT: 4300 PROCESS: BiCMOS/DMOS
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15
1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
Typical Application Circuits
VIN 4.5V TO 40V C10 0.1F C3 0.1F
D1
IN R1 1.4M C1 10F REG
DVREG
C-
C+
BST LX
C4 0.1F L1 47H D2 C5 47F C6 6.8nF R6 187 VOUT R3 6.81k
MAX5080
ON/OFF R2 549k C2 0.1F FB SS COMP C9 0.047F
C8 820pF R4 4.02k R5 3.01k C7 22nF
SYNC SGND PGND
PGND
PGND
Figure 5. MAX5080 Typical Application Circuit
VIN 7.5V TO 40V
C10 0.1F
D1
IN R1 1.4M C1 10F REG
DVREG
BST LX
C4 0.1F L1 47H D2 C5 47F C6 6.8nF R6 187 VOUT R3 6.81k
MAX5081
ON/OFF R2 301k C2 0.1F FB SS COMP C9 0.047F
C8 820pF R4 4.02k R5 3.01k C7 22nF
SYNC SGND PGND
PGND
PGND
Figure 6. MAX5081 Typical Application Circuit
16
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1A, 40V, MAXPower Step-Down DC-DC Converters
Typical Operating Circuits (continued)
VIN 7.5V TO 40V D1
MAX5080/MAX5081
IN R1
DVREG
BST LX
CBST L1 VOUT C6
C1
REG
MAX5081
ON/OFF SYNC SGND PGND C2 PGND SS CSS FB
D2
C5 R6
R3
C8 R2 COMP R5 C7 R4
PGND
Pin Configurations
PGND BST BST 10 LX LX LX LX
TOP VIEW
12
11
10
9
12
11
IN IN REG SGND
13 14
8 7
CC+ DVREG SYNC
IN IN REG SGND
PGND 9
13 14
8 7
N.C. N.C. DVREG SYNC
MAX5080
15 16 1 COMP 2 FB 3 ON/OFF 4 SS 6 5 15 16 1 COMP
MAX5081
6 5 2 FB 3 ON/OFF 4 SS
TQFN
TQFN
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17
1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
18
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QFN THIN.EPS
1A, 40V, MAXPower Step-Down DC-DC Converters
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX5080/MAX5081
Revision History
Pages changed at Rev 1: 1, 8, 18, 19
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 (c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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